Asynchronous reconfigurable CNN design
- Asynchronous reconfigurable CNN design
The chip works exactly right.
Synchronous and asynchronous areas are basically the same.
Handshake
unit Click accounted for a very small proportion
(1.6%) of the total area;
The
power consumption of asynchronous computing array is
30% lower than that of synchronous computing
array.
The reliability of the design method at 65nm is further verified.
asynchronous reconfigurable SNN design
- Asynchronous reconfigurable SNN design
An efficient event-driven updating mechanism of event step size is proposed;
Asynchronous SNN accelerator: 1024 neurons, 1 million synapses, 8-bit fixed-point weight;
Lenet-5, the identification accuracy of 98%, higher than all other literature results;
Asynchronous circuits design flow
- Asynchronous circuits design flow
The silicon test results show that the asynchronous accelerator has 30% less power
in computing array than the synchronous one in TSMC 65nm CMOS process,
and the energy efficiency of the asynchronous and synchronous accelerators
are 1.539 TOPS/W and 1.37 TOPS/W respectively.
The energy efficiency of the asynchronous accelerator in TSMC 180nm CMOS
process is 133 GOPS/W.
Design flow for Click-based asynchronous BD circuits
National High-tech R&D Program (863 Program)
National Natural Science Foundation of China
Tsinghua University
Ministry of Science and Technology of China